SI/PI Simulation
The EDADOC SI simulation team has 15+ years of experience in DDR4/DDR3/ DDR2 parallel bus and high speed serial bus simulation such as PCIE、SATA、SAS、SFP+ and 10G-KR. We provide suggestions to design the proper topology, select the best termination and driver, and optimize the whole channel to get the lowest loss and best eye open. We also have DDR4 and 56G-PAM4 signal design and simulation capabilities.-
Ⅰ.SI Simulation SI Simulation
☉Parameters sweeping
☉Topological definition
☉Static timing analysis
☉Transmission path optimization
Constraint driven design
☉Electrical Rules
☉Physics, spacing Rules
☉Topological Rules
☉Impedance rule and length match
Post Simulation
☉Reflection and crosstalk analysis report
☉Comprehensive timing analysis
☉Multi-board co-simulation
Test and Verify
☉SI testing
☉S-Parameter measurement
☉Testing report analysis
Ⅱ.PI Simulation IR-Drop Analysis
☉Make sure the PCB traces and planes can handle power supply requirements
☉IR-drop,current density and via current analysis
☉Electric and heat hybrid analysis
PI analysis
☉PDN Design of high-speed and high-power systems
☉Bypass capacitor selection based on time domain and frequency domain performances
☉Frequency Domain Target Impedance analysis
IR-Drop report 
Temperature Rising diagram -
-
10G High Speed Backplane: Simulation for Transmission path 【Interface 】： 10G-KR 【Standard 】： 802.3ap 【Standard 】： 10Gpbs 【SI setting】： Output from optical device. The transmission distance in Line card is 3.5inch. In Backplane is 11inch. Then go to another line card by High speed connector for 4inch.
10G High Speed Backplane: Simulation for Eye Diagram 【Interface 】 10G-KR 【Standard 】： 802.3ap 【Frequency】： 10Gpbs 【SI setting】： Output from optical device. The transmission distance in Line card is 3.5inch. In Backplane is 11inch. Then go to another line card by High speed connector for 4inch.
Timing analysis 【Interface 】： PPC Bus, CPCI 【Standard 】： Common Clock, CPCI SPEC 【Frequency】： 200M 【SI setting】： This is a standard CPCI structure，There is CPCI bus, PCIE Bus. The key ICs, CPU：MPC7448，PCI bridge：MV64460. For Parallel I/O system, 200M may touch the limit. 
-
